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	<title>All About Digital Signal Processing</title>
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		<title>DSP Application areas</title>
		<link>http://dspexpert.wordpress.com/2009/06/16/dsp-application-areas/</link>
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		<pubDate>Tue, 16 Jun 2009 21:31:05 +0000</pubDate>
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				<category><![CDATA[DSP Application areas]]></category>

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		<description><![CDATA[DSP, being one of the fastest growing fields in modern electronics, is used in any area where information is handled in a digital form or controlled by a digital processor. Its application areas include the following: Image Processing - pattern recognition - robotic vision - animation - image enhancement Military - missile guidance - secure [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=dspexpert.wordpress.com&amp;blog=8023656&amp;post=78&amp;subd=dspexpert&amp;ref=&amp;feed=1" width="1" height="1" />]]></description>
			<content:encoded><![CDATA[<p>DSP, being one of the fastest growing fields in modern electronics, is  used in any area where information is handled in a digital form or controlled by a digital processor. Its application areas include the following:</p>
<ul>
<li><strong>Image Processing</strong></li>
</ul>
<p>- pattern recognition</p>
<p>- robotic vision</p>
<p>- animation</p>
<p>- image enhancement</p>
<ul>
<li><strong>Military</strong></li>
</ul>
<p>- missile guidance</p>
<p>- secure communication</p>
<p>- sonar processing</p>
<ul>
<li><strong>Telecommunication</strong></li>
</ul>
<p>- data communication</p>
<p>- video conferencing</p>
<p>- echo cancellation</p>
<p>- video conferencing</p>
<ul>
<li><strong>Bio-medical</strong></li>
</ul>
<p>- X-ray storage/enhancement</p>
<p>- patient monitoring</p>
<p>- EEG brain mappers</p>
<p>- ECG analysis</p>
<ul>
<li><strong>Consumer applications</strong></li>
</ul>
<p>- digital,cellular mobile phones</p>
<p>- Internet phones, music,video</p>
<p>- digital television</p>
<p>- digital cameras</p>
<p>- active suspension in cars</p>
<ul>
<li><strong>Speech and audio</strong></li>
</ul>
<p>- digital audio</p>
<p>- speech recognition</p>
<p>- equalization</p>
<p>- text to speech</p>
<p>The above list is not an all exhaustive list of DSP applications.</p>
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		<title>DSP Pros and Cons</title>
		<link>http://dspexpert.wordpress.com/2009/06/16/dsp-introduction/</link>
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		<pubDate>Tue, 16 Jun 2009 00:00:28 +0000</pubDate>
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				<category><![CDATA[What and Why of DSP]]></category>

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		<description><![CDATA[DSP is concerned with the digital representation of signals and the use of digital processors to analyze,modify or extract information from signals. Most signals are analog(continously vary in time) in nature. These analog signals are sampled and converted into digital form to perform DSP operations on them. The reason behind digital processing of signals by [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=dspexpert.wordpress.com&amp;blog=8023656&amp;post=71&amp;subd=dspexpert&amp;ref=&amp;feed=1" width="1" height="1" />]]></description>
			<content:encoded><![CDATA[<p>DSP is concerned with the digital representation of signals and the use of digital processors to analyze,modify or extract information from signals. Most signals are analog(continously vary in time) in nature. These analog signals are sampled and converted into digital form to perform DSP operations on them.</p>
<p>The reason behind digital processing of signals by converting an analog signal into digital format is as follows:</p>
<p>1) Great flexibility &#8211;  DSP systems can be programmed and re-programmed to perform to perform a variety of functions, without modifying  the hardware. This is one of the most important features of DSP.</p>
<p>2) Perfect reproducibility &#8211; Identical performance from unit to unit is obtained since there are no variations due to component tolerances. eg: using DSP techniques, a digital recording can be copied or reproduced several times over without any degradation.</p>
<p>3) No drift in performance with temperature or age.</p>
<p>4) DSP performs functions which are not possible in analog signal processing. eg: linear phase response can be achieved and complex adaptive filtering algorithms can be implemented using DSP techniques.</p>
<p>5) Guaranteed accuracy &#8211; Accuracy is only determined by the number of bits used.</p>
<p>Like the two sides of a coin, the disadvantages of DSP are:</p>
<p>1) Design time &#8211; Requires necessary resources like softwares etc. DSP designs are time consuming and at times impossible. Also, the shortage of suitable engineers in this field is widely recognized.</p>
<p>2) Finite Wordlength problems &#8211; Use of insufficient number of bits are used to represent variables, serious degradation in system performance may result. The economic considerations, limit the number of  number if bits used.</p>
<p>3) Speed and Cost &#8211; DSP designs are expensive when large bandwidth signals are involved. Currently, fast ADC&#8217;s and DAC&#8217;s either are too expensive or do not have the sufficient resolution for wide bandwidth DSP applications. Bandwidths in the 100MHz range are still processed using analog methods. Nevertheless, DSP devices are becoming faster and faster.</p>
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		<title>Design of a simple Low Noise Amplifier for a 10-12 GHz Satellite Receiver</title>
		<link>http://dspexpert.wordpress.com/2009/06/14/design-of-a-simple-low-noise-amplifier-for-a-10-12-ghz-satellite-receiver/</link>
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		<pubDate>Sun, 14 Jun 2009 04:26:16 +0000</pubDate>
		<dc:creator>dspexpert</dc:creator>
				<category><![CDATA[Course Works]]></category>

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		<description><![CDATA[Abstract—This paper deals with the design of a Low-Noise Amplifier (LNA), that functions over the 10-12GHz frequency band and can be used in satellite receiver applications. The amplifier is realized using an ultra-low-noise Pseudomorphic High Electron Mobility Transistor (PHEMT). The goals of the design process are to achieve a low noise figure of less than [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=dspexpert.wordpress.com&amp;blog=8023656&amp;post=26&amp;subd=dspexpert&amp;ref=&amp;feed=1" width="1" height="1" />]]></description>
			<content:encoded><![CDATA[<p align="center"><em>Abstract—</em><strong>This paper deals with the design of a Low-Noise Amplifier (LNA), that functions over the 10-12GHz frequency band and can be used in satellite receiver applications. The amplifier is realized using </strong><strong>an ultra-low-noise Pseudomorphic High Electron Mobility Transistor (PHEMT). The goals of the design process are to achieve a low noise figure of less than 0.6dB along with a reasonable forward gain of at least 13.25dB. An input return loss of less than -10dB and an output return loss of less than -15dB are also a part of the design constraints. Lastly, a review of whether bias can be supplied via the matching circuits is studied. In this exercise, Agilent’s ADS is extensively used, in performing the simulation and in the optimization of the circuit parameters, to attain the desired LNA characteristics.</strong></p>
<p><strong> </strong></p>
<p><strong>I. Introduction</strong></p>
<p><strong> </strong></p>
<p>The design process is broadly divided into two phases. In the first phase an LNA is designed at a single point frequency which is the centre frequency of the given frequency band of 10-12GHz. Therefore, a narrow-band matched LNA is designed, using 2-element matching topology, which is centred at a frequency of 11GHz. It is ensured that the designed matched circuit, at this stage, meets all the design requirements in order to proceed further to the next phase of the exercise. In the second phase, the design from the first phase is modified to ensure the desired working of the circuit over a broad frequency band of 2GHz. The design process can be labelled as successful when the circuit remains stable and meets all the requirements in the entire frequency range of 10-12GHz range. Lastly, the suitable bias networks for the design are studied in the light of the matching circuits.</p>
<p>Since the ultimate goal is to design a Low-noise Amplifier, an important factor in this design process is therefore the noise figure of the amplifier. It is often required to have a pre-amplifier with as low a noise figure as possible since the first stage of a receiver front end has the dominant effect on the noise performance of the overall system. Further, an equal importance is required to be given to the forward gain of the amplifier as it is not possible to obtain both the minimum noise figure and the maximum gain for an amplifier. Therefore, a compromise must be made [1].</p>
<p>The compromise discussed above can be realized by making use of the constant gain circles and the constant noise figure circles which will be discussed shortly.</p>
<p>Initially, the amplifier is realized with the help of the <strong>ATF-36077</strong> transistor commercialized by Avago technologies. This transistor can provide a typical 12GHz noise figure of 0.5dB with an associated gain of 12dB. It is considered to be a suitable transistor in designing broad-band low noise amplifiers [2].</p>
<p>Finally, a number of design tools and iterative operators such as the Smith Chart Utility, Tune Parameter Utility, Optimizer Utility and the Schematic Design Templates for noise figure calculations etc, all incorporated in Agilent ADS electronic design automation software, were used to perform the design process.</p>
<p><strong>II. Initialization</strong></p>
<p><strong>a) </strong><strong>Stability of the transistor</strong></p>
<p><strong> </strong></p>
<p>The first step in designing any amplifier is to select a transistor which would enable the user to design an amplifier according to the requirements. The design of amplifiers and other RF components such as oscillators etc rely primarily on the terminal characteristics of the transistor. The reason for choosing the ATF-36077 is due to its characteristics already mentioned above.</p>
<p>The next step is to look for the stability of the transistor at the desired frequency of operation. The stability of the transistor can be measured either with the help of the <strong>StabFact </strong>function available in the Simulation-S_Param palette or alternatively, by plotting the stability circles on the smith chart. On analyzing the transistor, it was found that its k-factor was about 0.834 at the required 11GHz frequency. The k-factor is clearly less than 1. Hence, the device is potentially unstable and will most likely oscillate at certain combinations of source and load impedances. This is certainly not desired as the design specification is to model a stable design circuit. This can be rectified by using a stabilizing resistor. The placement of this resistor is usually application dependant. The resistor can be placed in shunt or series at either the input or the output terminal of the transistor. For an LNA, it is characteristic to add the stabilizing resistor at the load end of the transistor. This is because, the receivers end of various communication systems receive a very low power signals. Therefore, when a resistor is added at the transistor input, the amplifier amplifies the noise generated by the resistor along with the input signal. This amplifies the noise that is introduced by the resistor into the signal, making it increasingly incoherent [1]. A schematic of the stabilization circuit is shown in figure 1.</p>
<p><strong><img class="aligncenter size-full wp-image-36" title="2" src="http://dspexpert.files.wordpress.com/2009/06/21.jpg?w=455&#038;h=244" alt="2" width="455" height="244" /></strong></p>
<p><strong> </strong></p>
<p><strong>Fig.1 Schematic of the transistor stabilization circuit</strong></p>
<p><strong><br />
</strong></p>
<p><img class="aligncenter size-full wp-image-37" title="3" src="http://dspexpert.files.wordpress.com/2009/06/31.jpg?w=455&#038;h=244" alt="3" width="455" height="244" /></p>
<p><strong>Fig.2 Stability factor of the transistor after stabilizing</strong></p>
<p>The stabilization resistor used to improve the stability factor though, increases the k-factor; it has an adverse affect on the gain and noise figure of the amplifier. This is due to the fact that the resistor acts as an attenuator at the output and also a source of thermal noise. A method to overcome this is explained in the next section.</p>
<p><strong>b) </strong> <strong>Noise and Gain circles</strong></p>
<p><strong> </strong></p>
<p>As discussed earlier, it is not possible to obtain both minimum noise figure and maximum gain for an amplifier. By using constant gain circles and circles of constant noise figure, a usable trade-off between noise figure and gain can be achieved. The noise figure of a two port amplifier can be expressed as</p>
<p>where, Fmin=minimum noise figure of transistor,</p>
<p>Ys=source admittance,</p>
<p>Yopt=optimum source admittance that results in minimum noise figure,</p>
<p>RN= equivalent noise resistance of transistor,</p>
<p>GS=real part of source admittance.</p>
<p>From the above equation, it can be inferred that the minimum noise figure is obtainable when .</p>
<p>Y<sub>S</sub> and Y<sub>opt</sub> depend on the source reflection coefficients Г<sub>S</sub> and optimal source reflection coefficients Г<sub>opt</sub> respectively [1].</p>
<p>Also, the factors such as output reflection coefficient Г<sub>O</sub>, the load reflection coefficient Г<sub>L</sub>, and the input reflection coefficient Г<sub>I</sub>, which determine the parameters of the matching circuit and hence the gain and return loss of the amplifier, are also dependant on Г<sub>S</sub> which makes the choice of Г<sub>S</sub> an important factor in the design process.</p>
<p>The use of the ‘<strong>Sparams_wNoise’</strong> Design Template of ADS, automatically simulates the S-parameters and noise figure of the two-port network, and generates Smith chart plots for S11 and S22, and rectangular plots for dB(S21) and dB(S12). The Smith charts include a circle of constant VSWR, whose value can be set. In addition, it generates zoomed plots of S11 and S21, over a reduced frequency range. Also, plots showing available gain, noise figure, and stability circles are created. [3]. Using the data obtained by simulating the transistor in the noise template, we can choose a suitable Г<sub>S. </sub>Figure 3 shows the plot of the noise and gain circles on a single plot.</p>
<p><img class="aligncenter size-full wp-image-38" title="4" src="http://dspexpert.files.wordpress.com/2009/06/4.jpg?w=455&#038;h=244" alt="4" width="455" height="244" /></p>
<p><strong>Fig.3    Smith chart with both noise and gain circles on a single plot.</strong></p>
<p><strong>c) </strong><strong>Source Inductance</strong></p>
<p><strong> </strong></p>
<p>Before going to the all important section of selecting a suitable source reflection coefficient, an important concept of source inductance is needed to be discussed. The following circuit was made use to come up with an optimum range of source inductance for the circuit.</p>
<p><img class="aligncenter size-full wp-image-39" title="5" src="http://dspexpert.files.wordpress.com/2009/06/5.jpg?w=455&#038;h=244" alt="5" width="455" height="244" /></p>
<p><strong>Fig.4   Initial circuit to test transistor characteristics</strong></p>
<p>The effect of source inductance on the circuit is that it increases the area of the smith chart under the gain circles and also moves the optimum position of maximum available gain closer to the optimum position of the noise figure circle. This is a desirable characteristic as it improves the input matching of the amplifier [4]. Along with this, a proper selection of the source impedance also improves the stability of the transistor. The presence of the source inductance does this by forming a resonant circuit with the intrinsic capacitor coupled output of the transistor.</p>
<p>Table.1 below shows the variation in MAG k-factor and noise figure for varying source inductance values at the 11GHz frequency.</p>
<p><strong>Table. 1 Variation of transistor characteristics with varying source inductance</strong></p>
<table border="1" cellspacing="0" cellpadding="0">
<tbody>
<tr>
<td width="78" valign="top">Source   Inductance(pH)</td>
<td width="78" valign="top">MAG(Db)</td>
<td width="78" valign="top">Noise   figure(dB)</td>
<td width="78" valign="top">k-factor</td>
</tr>
<tr>
<td width="78" valign="top">30</td>
<td width="78" valign="top">15.966</td>
<td width="78" valign="top">0.471</td>
<td width="78" valign="top">1.035</td>
</tr>
<tr>
<td width="78" valign="top">35</td>
<td width="78" valign="top">15.792</td>
<td width="78" valign="top">0.471</td>
<td width="78" valign="top">1.051</td>
</tr>
<tr>
<td width="78" valign="top">40</td>
<td width="78" valign="top">15.719</td>
<td width="78" valign="top">0.471</td>
<td width="78" valign="top">1.058</td>
</tr>
<tr>
<td width="78" valign="top">45</td>
<td width="78" valign="top">15.725</td>
<td width="78" valign="top">0.471</td>
<td width="78" valign="top">1.044</td>
</tr>
<tr>
<td width="78" valign="top">50</td>
<td width="78" valign="top">15.815</td>
<td width="78" valign="top">0.471</td>
<td width="78" valign="top">1.025</td>
</tr>
<tr>
<td width="78" valign="top">55</td>
<td width="78" valign="top">16.031</td>
<td width="78" valign="top">0.472</td>
<td width="78" valign="top">1.000</td>
</tr>
<tr>
<td width="78" valign="top">60</td>
<td width="78" valign="top">16.782</td>
<td width="78" valign="top">0.472</td>
<td width="78" valign="top">0.970</td>
</tr>
<tr>
<td width="78" valign="top">65</td>
<td width="78" valign="top">16.733</td>
<td width="78" valign="top">0.472</td>
<td width="78" valign="top">0.937</td>
</tr>
</tbody>
</table>
<p>It can be inferred from the above table that the maximum available gain and the k-factor initially increase with increasing source inductance, reach a peak value (resonant value) and then tend to fall again. In the light of the data obtained from the above table the source inductance was chosen to be 50 pH. Although, at 55pH, a higher gain can be obtained, it was not considered because the stability factor at the 12GHz frequency would fall below 1 making the transistor unstable for the broad band matching. Therefore, 50pH was chosen as an optimum source inductance value for the LNA design.</p>
<p><strong>d) </strong><strong>Combined effect of Source Inductance and stabilizing resistor</strong></p>
<p><strong> </strong></p>
<p>Previously, we discussed the need for a stabilizing resistor at the output and how a higher value of this resistance would adversely affect the noise figure and gain of the transistor and therefore, the need to reduce its value. With the help of the source inductance, as discussed previously, the stability of the transistor improved thereby allowing us to use a much lower resistance value than the 6 ohm resistor which was previously used. The following circuit was used to study the combined affect of the source inductance and stabilizing resistor to obtain optimum values for both.</p>
<p><img class="aligncenter size-full wp-image-40" title="6" src="http://dspexpert.files.wordpress.com/2009/06/6.jpg?w=455&#038;h=244" alt="6" width="455" height="244" /></p>
<p><strong>Fig.5 Circuit for studying the combined affect of Source inductance and stabilizing resistance.</strong></p>
<p>On simulating the above circuit, it was observed that, at constant source inductance of 50pH, when the stabilizing resistance was varied, there was a notable variation in the distance between the optimal points of noise and gain circles. The increasing resistance value, though decreased the MAG of the amplifier, it was also moving the gain circles closer to the noise circles. The closeness of the circles is desired for two reasons. Firstly, it improves the input matching of the amplifier and secondly in broad band design, where selection of Г<sub>S </sub>and Г<sub>L </sub>closer to the centre of the Smith chart minimizes the mismatch and maximizes the bandwidth. This will be discussed in the later sections.</p>
<p>Therefore, from the above discussion, adding a small value of stabilizing resistance can be useful in the circuit design. But, the flip side of the idea is that the resistance value needs to be limited to a certain value so that it does not eat into the required forward gain. For this reason, a stabilizing resistance value of 2ohm was chosen.</p>
<p><strong>e) </strong><strong>Choice of source reflection coefficient (Г<sub>S</sub>) </strong></p>
<p><strong> </strong></p>
<p>The value of Sopt shown in the figure below is the optimum value of source reflection coefficient in order to obtain the optimal source impedance Y<sub>opt</sub>, at which a minimum noise figure of 0.489dB is attainable. At this noise level, the attainable forward gain is about 14.01dB. Although this value is above the design constraint off 13.25dB, it is advisable to go for a higher forward gain at the cost of a sensible increase in the noise figure. This is because the constraint on the value of the noise figure is at a maximum of 0.6dB.</p>
<p>An optimum value of the source reflection coefficient can be selected by plotting both the noise figure circles and the constant gain circles on the same smith chart. The red circles are the constant gain circles and the blue circles are the constant noise figure circles. The value of noise figure and forward gain are highest at the centre of their respective circles. On moving away from the centres, the noise figure and gain gradually decrease. Therefore, by choosing a point in the overlapping area between the two circles and ensuring that the point chosen gives the desired gain and does not exceed the noise figure constraint, the source reflection point can be chosen.  This is shown in figure 7 below.</p>
<p><img class="aligncenter size-full wp-image-41" title="7" src="http://dspexpert.files.wordpress.com/2009/06/7.jpg?w=455&#038;h=244" alt="7" width="455" height="244" /></p>
<p><strong>Fig.6 Loci of optimal source impedances for minimum noise figure.</strong></p>
<p><strong><img class="aligncenter size-full wp-image-42" title="8" src="http://dspexpert.files.wordpress.com/2009/06/8.jpg?w=455&#038;h=244" alt="8" width="455" height="244" /><br />
</strong></p>
<p><strong> </strong></p>
<p><strong>Fig.7 Selection of GammaS and GammaL on the smith chart.</strong></p>
<p>Form the above figure, the source reflection coefficient value was chosen to be 0.705 / 154.683. This value of source reflection coefficient would give a noise figure of just about 0.55dB and a forward gain of 14.51dB. Once the source reflection coefficient is determined, the output reflection coefficient, which is a function of the source reflection coefficient, can be easily calculated from the formula stated below.</p>
<p>)</p>
<p>Now that the Load and Source reflection coefficients are calculated, the matching networks for the transistor can be calculated.</p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>III. Lumped element impedance matching</strong></p>
<p><strong> </strong></p>
<p><strong>a)      2 –element matching</strong></p>
<p>A 2-element lumped element circuit topology is undertaken at this stage to realize the narrow band matching of the transistor input and output. The Input and Output Reflection Coefficients Г<sub>I</sub> and Г<sub>O</sub> are complex conjugates of the Source and Load Reflection Coefficients respectively. The Smith Chart Utility of ADS can be used to match both the input and the output sides of the transistor from the obtained Input and Output reflection coefficients.</p>
<p>A screen shot from the Smith Chart Utility is shown in figure 8. The obtained lumped element matching networks for the input and output are shown in fig 9 &amp; fig 10.</p>
<p><img class="aligncenter size-full wp-image-43" title="9" src="http://dspexpert.files.wordpress.com/2009/06/9.jpg?w=455&#038;h=244" alt="9" width="455" height="244" /></p>
<p><strong>Fig.8 Screenshot of Smith chart tool of ADS</strong></p>
<p><strong><img class="aligncenter size-full wp-image-44" title="10" src="http://dspexpert.files.wordpress.com/2009/06/10.jpg?w=455&#038;h=244" alt="10" width="455" height="244" /><br />
</strong></p>
<p><strong>Fig.9  2 element matching network for the input.</strong></p>
<p><img class="aligncenter size-full wp-image-45" title="11" src="http://dspexpert.files.wordpress.com/2009/06/111.jpg?w=455&#038;h=244" alt="11" width="455" height="244" /></p>
<p><strong>Fig.10 2 Element matching network for the output</strong></p>
<p>The lumped element amplifier circuit is presented in figure 11. The matching networks are low pass filter networks. On simulating the circuit in figure 11, the circuit meets all the requirements without any difficulties, that is, the circuit met all its requirements for the current stage of narrow band matching at 11GHz.</p>
<p><img class="aligncenter size-full wp-image-46" title="12" src="http://dspexpert.files.wordpress.com/2009/06/121.jpg?w=455&#038;h=244" alt="12" width="455" height="244" /></p>
<p><strong>Fig.11 Amplifier circuit for the 11GHz LNA</strong></p>
<p><strong>b)     Performance of the 11GHz LNA</strong></p>
<p>Following it are the results obtained on simulating the circuit of figure 11.</p>
<p><img class="aligncenter size-full wp-image-47" title="13" src="http://dspexpert.files.wordpress.com/2009/06/13.jpg?w=455&#038;h=244" alt="13" width="455" height="244" /></p>
<p><strong>Fig.12 Input and Output return loss of the 11GHz LNA</strong></p>
<p><img class="aligncenter size-full wp-image-48" title="14" src="http://dspexpert.files.wordpress.com/2009/06/14.jpg?w=455&#038;h=244" alt="14" width="455" height="244" /></p>
<p><strong>Fig.13 Noise Figure of the 11GHz LNA.</strong></p>
<p><img class="aligncenter size-full wp-image-49" title="15" src="http://dspexpert.files.wordpress.com/2009/06/15.jpg?w=455&#038;h=244" alt="15" width="455" height="244" /></p>
<p><strong>Fig.14 Forward gain of the 11 GHz LNA.</strong></p>
<p><strong> </strong></p>
<p>From the above figures, it can be concluded that the 11GHz LNA has met all the design constraints of gain, noise figure, input and output return loss and stability criteria successfully.</p>
<p><strong>IV. Broad-band Low Noise Amplifier design</strong></p>
<p>In this part of the report we will be discussing about the methodology used to operate the LNA over a bandwidth of 2GHz. In the first phase, we designed a conjugately matched amplifier which had high gain and a good match over a narrow bandwidth. If there was no matching, the amplifier will have performance over a broad band but will then suffer from poor gain and matching. The current goal is to improve both gain and bandwidth at the cost of matching. In such a case, it is preferable to design for less than the maximum obtainable gain, to improve bandwidth or to obtain a specific value of the amplifier gain. This can be done by designing input and output matching networks to have less than maximum gains; in other words, mismatches are purposely introduced to reduce the overall gain [5]. The design procedure is facilitated by plotting both the constant gain circles and constant noise circles on the same smith chart.</p>
<p><strong>a) </strong><strong>Review of source reflection coefficient</strong></p>
<p>The source reflection coefficient that was used in the beginning was reviewed and a need to obtain a reflection coefficient much closer to the centre of the smith chart was felt. The idea behind the closeness of the source reflection coefficient to the centre of the smith chart ensures that the coefficient has lesser magnitude. This indirectly affects the bandwidth of the amplifier. This can be well explained with the help of the Q circle shown in the following figure.</p>
<p><img class="aligncenter size-full wp-image-50" title="16" src="http://dspexpert.files.wordpress.com/2009/06/16.jpg?w=455&#038;h=244" alt="16" width="455" height="244" /></p>
<p><strong>Fig.15 Smith chart showing a Q circle on it with Q=1.</strong></p>
<p>The red circle shown in the above figure represents the Q-circle of Q=1. Since circuit Q is inversely proportional to the bandwidth, a lower Q means a higher bandwidth is realizable. Therefore, if the source and load reflection coefficients are chosen such that they lie within a particular Q-circle, a reasonable bandwidth can be achieved. Hence the need to choose a reflection coefficient which is closer to the centre of the smith charts. The previous value chosen for the source reflection coefficient was about 0.705 / 154.683 which, in terms if magnitude is 0.705. Therefore a source reflection coefficient less than this is chosen. The new coefficient chosen was 0.647 / 148.230. The corresponding Load reflection coefficient was 0.585 / 127.878, which is also less than the value previously chosen.</p>
<p><strong>b) </strong><strong>Circuit Topology</strong></p>
<p><strong> </strong>Two simple circuit topologies are discussed in this section. One is the T-network and the other is the pi-network. These compensated filter matching networks increase the flexibility as well as the complexity of the matching networks. The reason behind moving from a 2 element circuit topology to a 3 element circuit is that the 3 element topology gives the freedom of choosing a Q value that could prove suitable for obtaining a desired bandwidth. This freedom is not available in 2 element matching network. The use of either a T network or a pi network can be used and when the matching elements are chosen such that the path taken by the reflection coefficients to reach the centre of the smith chart spends more time around the centre of the smith chart, a broader bandwidth can be obtained. This is illustrated in the following figure. In this exercise, the pi network was used.</p>
<p><img class="aligncenter size-full wp-image-51" title="17" src="http://dspexpert.files.wordpress.com/2009/06/17.jpg?w=455&#038;h=244" alt="17" width="455" height="244" /></p>
<p><strong>Fig.16 Smith chart showing the variation of the Input and Output return los components with frequency.</strong></p>
<p><strong>c) </strong><strong>Matching networks</strong></p>
<p>As mentioned earlier, the pi matching networks were used in this exercise to obtain the 2GHz bandwidth for the LNA. The smith chart tool from ADS was used to design matching sections of the input and output. Following figures illustrate the networks.</p>
<p><img class="aligncenter size-full wp-image-52" title="18" src="http://dspexpert.files.wordpress.com/2009/06/18.jpg?w=455&#038;h=244" alt="18" width="455" height="244" /></p>
<p><strong>Fig.17 3 element input matching circuit for broadband performance of the LNA</strong></p>
<p><img class="aligncenter size-full wp-image-53" title="19" src="http://dspexpert.files.wordpress.com/2009/06/19.jpg?w=455&#038;h=244" alt="19" width="455" height="244" /></p>
<p><strong>Fig.18 3element output matching circuit for broadband performance of the LNA</strong></p>
<p>The smith chart below shows the path of the output matching network. It can be observed that the path spends a longer time around the centre of the smith chart thereby making a higher bandwidth attainable.</p>
<p><strong> </strong></p>
<p><img class="aligncenter size-full wp-image-54" title="20" src="http://dspexpert.files.wordpress.com/2009/06/20.jpg?w=455&#038;h=244" alt="20" width="455" height="244" /></p>
<p><strong>Fig.19 Path of the reflection coefficient while 3 element output matching for the LNA.</strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>d) </strong><strong>Broad-band Amplifier circuit</strong></p>
<p>The 3 element matching networks obtained earlier were incorporated in the amplifier in place of the 2 element networks and the performance was observed. The initial circuit is as shown below.</p>
<p><img class="aligncenter size-full wp-image-55" title="21" src="http://dspexpert.files.wordpress.com/2009/06/211.jpg?w=455&#038;h=244" alt="21" width="455" height="244" /></p>
<p><strong>Fig.20 Broadband Amplifier circuit.</strong></p>
<p>The above circuit, when simulated, could not fully meet all the goals of gain, noise figure and return loss. Therefore, the optimization tool was used. Repeated optimization cycles with selectively updating the optimized variable values helped in attaining all the design goals perfectly. The following figure shows the goals used in the optimization phase.</p>
<p><img class="aligncenter size-full wp-image-56" title="22" src="http://dspexpert.files.wordpress.com/2009/06/22.jpg?w=455&#038;h=244" alt="22" width="455" height="244" /></p>
<p><strong>Fig.21 Use of optimizer tool and goals </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>e)      Performance of the broad-band LNA</strong></p>
<p><strong> </strong></p>
<p>The following figures show the performance of the LNA that is designed in this exercise.</p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><img class="aligncenter size-full wp-image-57" title="23" src="http://dspexpert.files.wordpress.com/2009/06/23.jpg?w=455&#038;h=244" alt="23" width="455" height="244" /></p>
<p><strong>Fig.22 Noise figure performance of the LNA over the 2 GHz bandwidth.</strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><img class="aligncenter size-full wp-image-58" title="24" src="http://dspexpert.files.wordpress.com/2009/06/24.jpg?w=455&#038;h=244" alt="24" width="455" height="244" /></p>
<p><strong>Fig.23 Forward gain of the LNA over the 2GHz bandwidth.</strong></p>
<p><strong> </strong></p>
<p><img class="aligncenter size-full wp-image-59" title="25" src="http://dspexpert.files.wordpress.com/2009/06/25.jpg?w=455&#038;h=244" alt="25" width="455" height="244" /></p>
<p><strong>Fig.24 Input and output return loss performance of the LNA over the 2GHz bandwidth.</strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p>The following table sums up the performance of the LNA.<strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>Table.2 Summary of the performance obtained over the 2 GHz bandwidth</strong></p>
<table border="1" cellspacing="0" cellpadding="0">
<tbody>
<tr>
<td width="104" valign="top"><strong> </strong></td>
<td width="104" valign="top"><strong>10 GHz</strong></td>
<td width="104" valign="top"><strong>12 GHz</strong></td>
</tr>
<tr>
<td width="104" valign="top"><strong>Gain</strong></td>
<td width="104" valign="top"><strong>14.856</strong></td>
<td width="104" valign="top"><strong>14.157</strong></td>
</tr>
<tr>
<td width="104" valign="top"><strong>Noise   figure</strong></td>
<td width="104" valign="top"><strong>0.598</strong></td>
<td width="104" valign="top"><strong>0.584</strong></td>
</tr>
<tr>
<td width="104" valign="top"><strong>S11</strong></td>
<td width="104" valign="top"><strong>-13.903</strong></td>
<td width="104" valign="top"><strong>-15.178</strong></td>
</tr>
<tr>
<td width="104" valign="top"><strong>S22</strong></td>
<td width="104" valign="top"><strong>-15.667</strong></td>
<td width="104" valign="top"><strong>-17.576</strong></td>
</tr>
</tbody>
</table>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>f)    Review of bias network</strong></p>
<p><strong> </strong></p>
<p>In order to ensure the performance of the amplifier, DC biasing of the amplifier is essential. Usually this is realized with the help of extra decoupling capacitors, RF chokes, resistors etc. In this exercise the use of the matching network itself as a bias network is discussed. Since the matching network is a pi network with the inductor in parallel to the drain of the transistor.  Since, in bias circuit design, an inductive drain feed is required to block the DC current; therefore, the parallel can be used to serve the dual purpose of a matching network and also as a inductive feed for the drain port of the transistor.</p>
<p>This is illustrated in the following figure.</p>
<p><strong> </strong></p>
<p><img class="aligncenter size-full wp-image-60" title="26" src="http://dspexpert.files.wordpress.com/2009/06/26.jpg?w=455&#038;h=244" alt="26" width="455" height="244" /></p>
<p><strong>Fig.25 Bias circuit implementation using the matching network.</strong></p>
<p><strong> </strong></p>
<p>The capacitor C4 acts as a DC block and C5 as DC ground.<strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>V.   Conclusion</strong></p>
<p>In this design exercise, we learnt how different factors are needed to be kept in mind while designing the amplifier and which parameters/components affect the performance of the amplifier and in what ways. Also, the fact that a change in a particular parameter value produces multiple performance affects which calls for an optimization so as to strike a balance among factors such as bandwidth, noise figure, gain, return loss etc.</p>
<p>This circuit was able to successfully meet the design specifications. The broadband stability and input &amp; output return loss have cleanly met the specifications. The forward gain was well above the required 13.25dB target. The noise figure though, was just under the 0.6Db and has scope of being further lowered.</p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong> </strong></p>
<p><strong>VII. References</strong></p>
<p>[1] David.M.Pozar (2005). Microwave Engineering. 3rd ed. USA: John Wiley &amp; Sons, Inc.. 557-559.</p>
<p>[2] Avago Technologies. (2008). ATF-36077 2–18 GHz Ultra Low Noise Pseudomorphic HEMT. Available: http://www.avagotech.com/docs/AV02-1222EN. Last accessed 26 Aptil 2009.</p>
<p>[3] Agilent Technologies. (2008). Preparing a Circuit for Simulation in ADS. Available: http://cp.literature.agilent.com/litweb/pdf/ads2008/cktsim/ads2008/Preparing_a_Circuit_for_Simulation_in_ADS.html. Last accessed 20 April 2009.</p>
<p>[4] Paul.J.Tasker (2009). Noise Theory and LNA Desiign. Cardiff School of Engineering.</p>
<p>[5] Paul.J.Tasker (2009). Broadband Design Concepts. Cardiff School of Engineering.</p>
<p><strong> </strong></p>
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